- Teacher: San San Maw
- Teacher: Admin User
- Teacher: Admin User
- Teacher: yin yinhtay
Course Objectives
▪ To conceptualize the basics of organizational and architectural issues of a digital
computer.
▪ To study the different ways of communicating with I/O devices and standard I/O
interfaces.
▪ To study the hierarchical memory system including cache memories and virtual
memory.
▪ To study various classes of instruction: data movement, arithmetic, logical, and
flow control.
▪ To appreciate how conditional operations are implemented at the machine level.
▪ To understand the way in which subroutines are called and returns made.
▪ To understand parallelism both in terms of a single processor and multiple
processors.
Learning Outcomes
The major outcomes of this course can be listed as
▪ Ability to perform computer arithmetic operations and control unit operations.
▪ Interpret the difference between hardwired and micro-programmed design approaches in CPU control unit design.
▪ Ability to understand the concept of I/O organization.
▪ Ability to conceptualize instruction level parallelism.
▪ Demonstrate the organization of memory hierarchy.
▪ Understand parallelism both in terms of a single processor and multiple processors.
▪ Understand how computer hardware has evolved to meet the needs of multi-processing systems.
▪ To conceptualize the basics of organizational and architectural issues of a digital
computer.
▪ To study the different ways of communicating with I/O devices and standard I/O
interfaces.
▪ To study the hierarchical memory system including cache memories and virtual
memory.
▪ To study various classes of instruction: data movement, arithmetic, logical, and
flow control.
▪ To appreciate how conditional operations are implemented at the machine level.
▪ To understand the way in which subroutines are called and returns made.
▪ To understand parallelism both in terms of a single processor and multiple
processors.
Learning Outcomes
The major outcomes of this course can be listed as
▪ Ability to perform computer arithmetic operations and control unit operations.
▪ Interpret the difference between hardwired and micro-programmed design approaches in CPU control unit design.
▪ Ability to understand the concept of I/O organization.
▪ Ability to conceptualize instruction level parallelism.
▪ Demonstrate the organization of memory hierarchy.
▪ Understand parallelism both in terms of a single processor and multiple processors.
▪ Understand how computer hardware has evolved to meet the needs of multi-processing systems.
- Teacher: Win Pa Pa San
- Teacher: Admin User
- Teacher: Sandar Htay
- Teacher: Admin User
- Teacher: dr.khin swe swe myint
- Teacher: Admin User
- Teacher: zinmar nwe
- Teacher: Saw Saw Wai